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» The Case for a Single-Chip Multiprocessor
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EUROPAR
2005
Springer
14 years 2 months ago
Hierarchical Scheduling for Moldable Tasks
The model of moldable task (MT) was introduced some years ago and has been proved to be an efficient way for implementing parallel applications. It considers a target application ...
Pierre-François Dutot
CODES
2002
IEEE
14 years 1 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
PPOPP
2009
ACM
14 years 9 months ago
A compiler-directed data prefetching scheme for chip multiprocessors
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
Dhruva Chakrabarti, Mahmut T. Kandemir, Mustafa Ka...
HPCA
2005
IEEE
14 years 8 months ago
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...
Dhruba Chandra, Fei Guo, Seongbeom Kim, Yan Solihi...
HIPEAC
2009
Springer
14 years 3 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...