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» The Case for a Single-Chip Multiprocessor
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DSD
2007
IEEE
164views Hardware» more  DSD 2007»
14 years 2 months ago
Execution-time Prediction for Dynamic Streaming Applications with Task-level Parallelism
— Programmable multiprocessor systems-on-chip are becoming the preferred implementation platform for embedded streaming applications. This enables using more software components,...
Peter Poplavko, Twan Basten, Jef L. van Meerbergen
CODES
2006
IEEE
14 years 2 months ago
Bounded arbitration algorithm for QoS-supported on-chip communication
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
Mohammad Abdullah Al Faruque, Gereon Weiss, Jö...
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
14 years 2 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 2 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
MICRO
2003
IEEE
99views Hardware» more  MICRO 2003»
14 years 1 months ago
Power-driven Design of Router Microarchitectures in On-chip Networks
As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik