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» The Case for a Single-Chip Multiprocessor
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FPL
2007
Springer
146views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips
The complexity of today’s embedded applications requires modern high-performance embedded System-on-Chip (SoC) platforms to be multiprocessor architectures. Advances in FPGA tec...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
14 years 4 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
CJ
2006
84views more  CJ 2006»
13 years 7 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
14 years 28 days ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu
RTS
2011
176views more  RTS 2011»
12 years 10 months ago
Improved priority assignment for global fixed priority pre-emptive scheduling in multiprocessor real-time systems
This paper is an extended version of a paper that appeared in the proceedings of the IEEE Real-Time Systems Symposium 2009. This paper has been updated with respect to advances ma...
Robert I. Davis, Alan Burns