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ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
14 years 29 days ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
FPL
2008
Springer
180views Hardware» more  FPL 2008»
13 years 10 months ago
Compiled hardware acceleration of Molecular Dynamics code
The objective of Molecular Dynamics (MD) simulations is to determine the shape of a molecule in a given biomolecular environment. These simulations are very demanding computationa...
Jason R. Villarreal, Walid A. Najjar
CGF
2010
179views more  CGF 2010»
13 years 7 months ago
Feature Oriented Progressive Lossless Mesh Coding
A feature-oriented generic progressive lossless mesh coder (FOLProM) is proposed to encode triangular meshes with arbitrarily complex geometry and topology. In this work, a sequen...
Jingliang Peng, Yan Huang, C.-C. Jay Kuo, Ilya Eck...
PLDI
1995
ACM
14 years 15 days ago
Storage Assignment to Decrease Code Size
DSP architectures typically provide indirect addressing modes with auto-increment and decrement. In addition, indexing mode is not available, and there are usually few, if any, ge...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
ICIP
2007
IEEE
14 years 10 months ago
Enable Efficient Compound Image Compression in H.264/AVC Intra Coding
This paper presents an efficient compound image compression approach based on H.264/AVC intra coding. The text blocks are distinguished from the picture blocks and compressed with...
Wenpeng Ding, Yan Lu, Feng Wu