4190 search results - page 18 / 838 » The Cost of Design |
DATE
2004
IEEE
14 years 1 months ago
2004
IEEE
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
AUTOMATICA
2006
13 years 10 months ago
2006
All approaches to optimal experiment design for control have so far focused on deriving an input signal (or input signal spectrum) that minimizes some control-oriented measure of ...
DAC
2010
ACM
14 years 1 months ago
2010
ACM
The emerging three-dimensional integrated circuit (3D IC) is beneficial for various applications from both area and performance perspectives. While the general trend in processor...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
DATE
2004
IEEE
14 years 1 months ago
2004
IEEE
Designing cost-sensitive real-time control systems for safetycritical applications requires a careful analysis of the cost/coverage trade-offs of fault-tolerant solutions. This fu...