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DATE
1999
IEEE
162views Hardware» more  DATE 1999»
14 years 2 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
ICNP
1997
IEEE
14 years 2 months ago
TCP behavior with many flows
TCP's ability to share a bottleneck fairly and efficiently decreases as the number of competing flows increases. This effect starts to appear when there are more flows than p...
Robert Morris
STACS
1998
Springer
14 years 2 months ago
On Disguised Double Horn Functions and Extensions
We consider Boolean functions represented by decision lists, and study their relationships to other classes of Boolean functions. It turns out that the elementary class of 1-decis...
Thomas Eiter, Toshihide Ibaraki, Kazuhisa Makino
ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
14 years 2 months ago
Generating instruction sets and microarchitectures from applications
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
Ing-Jer Huang, Alvin M. Despain
SPAA
1994
ACM
14 years 2 months ago
Bounds on the Greedy Routing Algorithm for Array Networks
We analyze the performance of greedy routing for array networks by providing bounds on the average delay and the average number of packets in the system for the dynamic routing pr...
Michael Mitzenmacher