244 search results - page 15 / 49 » The Design and Analysis of a Cache Architecture for Texture ... |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
TVLSI
2008
13 years 7 months ago
2008
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
MICRO
2003
IEEE
14 years 23 days ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
FCCM
1999
IEEE
13 years 11 months ago
1999
IEEE
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Supercomputer architects strive to maximize the performance of scientific applications. Unfortunately, the large, unwieldy nature of most scientific applications has lead to the...