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ECRTS
2004
IEEE
13 years 11 months ago
Schedulability-Driven Partitioning and Mapping for Multi-Cluster Real-Time Systems
We present an approach to partitioning and mapping for multicluster embedded systems consisting of time-triggered and eventtriggered clusters, interconnected via gateways. We have...
Paul Pop, Petru Eles, Zebo Peng, Viacheslav Izosim...
CODES
2007
IEEE
14 years 1 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
IMA
2007
Springer
132views Cryptology» more  IMA 2007»
14 years 1 months ago
New Branch Prediction Vulnerabilities in OpenSSL and Necessary Software Countermeasures
Abstract. Software based side-channel attacks allow an unprivileged spy process to extract secret information from a victim (cryptosystem) process by exploiting some indirect leaka...
Onur Aciiçmez, Shay Gueron, Jean-Pierre Sei...
DAC
2002
ACM
14 years 8 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 7 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...