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» The Design and Performance of a Conflict-Avoiding Cache
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MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
15 years 3 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
ASPLOS
2012
ACM
14 years 1 months ago
Scalable address spaces using RCU balanced trees
Software developers commonly exploit multicore processors by building multithreaded software in which all threads of an application share a single address space. This shared addre...
Austin T. Clements, M. Frans Kaashoek, Nickolai Ze...
ISCAS
2002
IEEE
118views Hardware» more  ISCAS 2002»
15 years 11 months ago
A power-configurable bus for embedded systems
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
Chuanjun Zhang, Frank Vahid
ISLPED
2010
ACM
165views Hardware» more  ISLPED 2010»
15 years 6 months ago
Dynamic workload characterization for power efficient scheduling on CMP systems
Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems...
Gaurav Dhiman, Vasileios Kontorinis, Dean M. Tulls...
176
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GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
15 years 11 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt