867 search results - page 56 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
167
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HPCA
2000
IEEE
15 years 10 months ago
2000
IEEE
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
143
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IEEEPACT
1998
IEEE
15 years 10 months ago
1998
IEEE
The SGI Origin 2000 is designedto support a wide range of applications and has low local and remote memory latencies. However, it often has a high ratio of remote to local misses....
161
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
176
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ISCA
2000
IEEE
15 years 9 months ago
2000
IEEE
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
168
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PPOPP
1997
ACM
15 years 10 months ago
1997
ACM
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...