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» The Design and Performance of a Real-Time I O Subsystem
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ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
13 years 11 months ago
Fast performance analysis of bus-based system-on-chip communication architectures
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
Kanishka Lahiri, Anand Raghunathan, Sujit Dey
DAC
2008
ACM
14 years 8 months ago
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing
Single-chip parallel processing requires high bandwidth between processors and on-chip memory modules. A recently proposed Mesh-of-Trees (MoT) network provides high throughput and...
Aydin O. Balkan, Gang Qu, Uzi Vishkin
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 1 months ago
High-level architecture exploration for MPEG4 encoder with custom parameters
Abstract - this paper proposes the use of a high-level architecture exploration method for different MPEG4 video encoders using different customization parameters. The targeted arc...
Marius Bonaciu, Aimen Bouchhima, Mohamed-Wassim Yo...
PPSC
1997
13 years 8 months ago
High-Performance Object-Oriented Scientific Programming in Fortran 90
We illustrate how Fortran 90 supports object-oriented concepts by example of plasma particle computations on the IBM SP. Our experience shows that Fortran 90 and object-oriented m...
Charles D. Norton, Viktor K. Decyk, Boleslaw K. Sz...
KDD
2006
ACM
155views Data Mining» more  KDD 2006»
14 years 7 months ago
Single-pass online learning: performance, voting schemes and online feature selection
To learn concepts over massive data streams, it is essential to design inference and learning methods that operate in real time with limited memory. Online learning methods such a...
Vitor R. Carvalho, William W. Cohen