Sciweavers

113 search results - page 15 / 23
» The Drill Down Benchmark
Sort
View
GECCO
2009
Springer
159views Optimization» more  GECCO 2009»
14 years 1 months ago
Bayesian network structure learning using cooperative coevolution
We propose a cooperative-coevolution – Parisian trend – algorithm, IMPEA (Independence Model based Parisian EA), to the problem of Bayesian networks structure estimation. It i...
Olivier Barrière, Evelyne Lutton, Pierre-He...
ASPLOS
2000
ACM
14 years 1 months ago
Power Aware Page Allocation
One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory ...
Alvin R. Lebeck, Xiaobo Fan, Heng Zeng, Carla Schl...
DAC
1999
ACM
14 years 1 months ago
Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
Vijay Sundararajan, Keshab K. Parhi
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
14 years 1 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
VLSID
1996
IEEE
132views VLSI» more  VLSID 1996»
14 years 28 days ago
A study of composition schemes for mixed apply/compose based construction of ROBDDs
Reduced Ordered Binary Decision Diagrams ROBDDs have traditionally been built in a bottom-up fashion. In this scheme, the intermediate peak memory utilization is often larger than...
Amit Narayan, Sunil P. Khatri, Jawahar Jain, Masah...