In this paper an analysis of a dynamically reconfigurable processor is presented. The network processor incorporates a processor and a number of coprocessors that can be connected...
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
CALLAWAY, ROBERT DAVID. An Autonomic Service Delivery Platform for Service-Oriented Network Environments. (Under the direction of Michael Devetsikiotis and Yannis Viniotis.) Servi...
Robert D. Callaway, Michael Devetsikiotis, Yannis ...
This paper presents a way of encoding some kinds of dynamic reconfiguration behaviour in the interface portion of circuit descriptions. This has many advantages. The user of a rec...