100 search results - page 5 / 20 » The Effect of Instruction Set Complexity on Program Size and... |
MICRO
2003
IEEE
13 years 12 months ago
2003
IEEE
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
ISCA
2002
IEEE
13 years 11 months ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...
POPL
2009
ACM
14 years 7 months ago
2009
ACM
Transactional memory (TM) is a promising paradigm for concurrent programming. Whereas the number of TM implementations is growing, however, little research has been conducted to p...
ICCD
2007
IEEE
14 years 3 months ago
2007
IEEE
Software integrity and confidentiality play a central role in making embedded computer systems resilient to various malicious actions, such as software attacks; probing and tamper...
ISCA
2003
IEEE
13 years 12 months ago
2003
IEEE
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...