Sciweavers

237 search results - page 29 / 48
» The Energy Efficiency of IRAM Architectures
Sort
View
HPCA
2008
IEEE
14 years 8 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
PDPTA
2000
13 years 9 months ago
Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures
The paper focuses on coarse-grained dynamically reconfigurable array architectures promising performance and flexibility for different challenging application areas, e. g. future ...
Jürgen Becker, Manfred Glesner, Ahmad Alsolai...
ITIIS
2008
128views more  ITIIS 2008»
13 years 7 months ago
An Asymmetric Key-Based Security Architecture for Wireless Sensor Networks
In spite of previous common assumptions about the incompatibility of public key cryptography (PKC) schemes with wireless sensor networks (WSNs), recent works have shown that they ...
Md. Mokammel Haque, Al-Sakib Khan Pathan, Choong S...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 1 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
ICCD
2008
IEEE
136views Hardware» more  ICCD 2008»
14 years 4 months ago
A resource efficient content inspection system for next generation Smart NICs
— The aggregate power consumption of the Internet is increasing at an alarming rate, due in part to the rapid increase in the number of connected edge devices such as desktop PCs...
Karthik Sabhanatarajan, Ann Gordon-Ross