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» The Energy Efficiency of IRAM Architectures
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DATE
2004
IEEE
168views Hardware» more  DATE 2004»
13 years 11 months ago
Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing
Energy efficient embedded systems consist of a heterogeneous collection of very specific building blocks, connected together by a complex network of many dedicated busses and inte...
Ingrid Verbauwhede, Patrick Schaumont, Christian P...
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
FPL
2008
Springer
96views Hardware» more  FPL 2008»
13 years 9 months ago
Towards benchmarking energy efficiency of reconfigurable architectures
Energy research in reconfigurable architectures often involves legacy benchmarks such as the MCNC benchmarks. These benchmarks, however, are not well-suited for assessing energy c...
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y....
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
14 years 2 months ago
De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring,...
Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimso...
GLOBECOM
2009
IEEE
13 years 11 months ago
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
Weirong Jiang, Viktor K. Prasanna