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PPL
2008
185views more  PPL 2008»
13 years 7 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
IEEEPACT
2009
IEEE
14 years 2 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
IEEEPACT
2005
IEEE
14 years 1 months ago
HUNTing the Overlap
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
Costin Iancu, Parry Husbands, Paul Hargrove
35
Voted
FAST
2011
12 years 11 months ago
Leveraging Value Locality in Optimizing NAND Flash-based SSDs
: NAND flash-based solid-state drives (SSDs) are increasingly being deployed in storage systems at different levels such as buffer-caches and even secondary storage. However, the ...
Aayush Gupta, Raghav Pisolkar, Bhuvan Urgaonkar, A...
VLDB
1998
ACM
180views Database» more  VLDB 1998»
13 years 12 months ago
Active Storage for Large-Scale Data Mining and Multimedia
The increasing performance and decreasing cost of processors and memory are causing system intelligence to move into peripherals from the CPU. Storage system designers are using t...
Erik Riedel, Garth A. Gibson, Christos Faloutsos