In this paper, starting from the limitations and constrains of traditional human learning approaches, we outline new suitable approaches to education and training in future knowle...
Angelo Gaeta, Pierluigi Ritrovato, Francesco Orciu...
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
This paper considers the current efforts to describe the effect of Internet-based technology on interactivity between citizens and public organizations to be incomplete and poorly...
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...