237 search results - page 33 / 48 » The Garp Architecture and C Compiler |
IEEEPACT
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
EUROPAR
2005
Springer
14 years 3 months ago
2005
Springer
Nested-parallelism programming models, where the task graph associated to a computation is series-parallel, present good analysis properties that can be exploited for scheduling, c...
FPGA
2005
ACM
14 years 3 months ago
2005
ACM
Configurable processors are becoming increasingly popular for modern embedded systems (especially for the field-programmable system-on-a-chip). While steady progress has been made...
SAMOS
2005
Springer
14 years 3 months ago
2005
Springer
—We describe the generation of the simulation environment for the Sandbridge Sandblaster multithreaded processor. The processor model is described using the Sandblaster architect...
IPPS
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...