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» The Garp Architecture and C Compiler
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TCAD
2008
118views more  TCAD 2008»
13 years 9 months ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
CODES
2007
IEEE
14 years 4 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
PLDI
1995
ACM
14 years 1 months ago
Corpus-Based Static Branch Prediction
Correctly predicting the direction that branches will take is increasingly important in today’s wide-issue computer architectures. The name program-based branch prediction is gi...
Brad Calder, Dirk Grunwald, Donald C. Lindsay, Jam...
NSDI
2008
14 years 3 days ago
Swift: A Fast Dynamic Packet Filter
This paper presents Swift, a packet filter for high performance packet capture on commercial off-the-shelf hardware. The key features of Swift include (1) extremely low filter upd...
Zhenyu Wu, Mengjun Xie, Haining Wang
CASES
2004
ACM
14 years 3 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder