2424 search results - page 142 / 485 » The High Level Architecture for Simulations |
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
EDCC
2006
Springer
14 years 19 days ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
ANCS
2005
ACM
14 years 2 months ago
2005
ACM
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
SIAMSC
2010
13 years 7 months ago
2010
In this work we discuss a class of defect correction methods which is easily adapted to create parallel time integrators for multi-core architectures and is ideally suited for deve...
IAJIT
2010
13 years 7 months ago
2010
: In this paper, new code families are constructed for spectral-amplitude coding optical code division multiple access, called random diagonal code for spectral amplitude coding op...