2424 search results - page 168 / 485 » The High Level Architecture for Simulations |
168
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HPCA
2001
IEEE
16 years 6 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
153
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ICPADS
2008
IEEE
16 years 11 days ago
2008
IEEE
This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC [16]. The Quarc scheme significantly outperforms the Spidergon NoC through balancing t...
150
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IPPS
2006
IEEE
15 years 12 months ago
2006
IEEE
DNA sequence comparison is a computationally intensive problem, known widely since the competition for human DNA decryption. Database search for DNA sequence comparison is of grea...
158
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SBACPAD
2005
IEEE
15 years 11 months ago
2005
IEEE
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
161
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ICCD
2007
IEEE
16 years 2 months ago
2007
IEEE
Hybrid nanoelectronics are emerging as one viable option to sustain the Moore’s Law after the CMOS scaling limit is reached. One main design challenge in hybrid nanoelectronics ...