2424 search results - page 20 / 485 » The High Level Architecture for Simulations |
DSN
2005
IEEE
14 years 2 months ago
2005
IEEE
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
DAC
1997
ACM
14 years 25 days ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
DAC
1994
ACM
14 years 22 days ago
1994
ACM
Abstract -- This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative...
ACSD
2009
IEEE
14 years 3 months ago
2009
IEEE
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...