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» The High Level Architecture for Simulations
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FPGA
2001
ACM
123views FPGA» more  FPGA 2001»
15 years 10 months ago
Mixing buffers and pass transistors in FPGA routing architectures
The routing architecture of an FPGA consists of the length of the wires, the type of switch used to connect wires (buffered, unbuffered, fast or slow) and the topology of the inte...
Mike Sheng, Jonathan Rose
ICCS
2001
Springer
15 years 10 months ago
Towards a Coupled Environmental Prediction System
Towards the realization of a global coupled air/ocean/ice predictive system for Navy needs, two high resolution modeling efforts are underway whose goals are the development and up...
Julie L. McClean, Wieslaw Maslowski, Mathew Maltru...
IJWMC
2007
84views more  IJWMC 2007»
15 years 6 months ago
Towards all-IP wireless networks: architectures and resource management mechanism
Future wireless Internet will consist of different wireless technologies that should operate together in an efficient way to provide seamless connectivity to mobile users. The in...
Majid Ghaderi, Raouf Boutaba
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
16 years 17 days ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
VLSID
2004
IEEE
209views VLSI» more  VLSID 2004»
16 years 6 months ago
An Architecture for Motion Estimation in the Transform Domain
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, ...