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TVLSI
2008
13 years 8 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
TSMC
2008
13 years 7 months ago
2008
This paper explores the issues faced in creating a sys-4 tem that can learn tactical human behavior merely by observing5 a human perform the behavior in a simulation. More specific...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
ATS
2004
IEEE
14 years 12 days ago
2004
IEEE
TIS (Test Instruction Set) is an instruction level technique for CPU core self-testing. This method is based on enhancing a CPU instruction set with test instructions. TIS replace...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...