The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
System on Chip architectures have traditionally relied upon bus based interconnect for their communication needs. However, increasing bus frequencies and the load on the bus calls...
This paper concerns the validity of a widely used method for estimating the architecture-level mean time to failure (MTTF) due to soft errors. The method first calculates the fai...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
This paper describes a methodology for developing processor specific tools such as assemblers, disassemblers, processor simulators, compilers etc., using processor models in a ge...