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» The High Level Architecture for Simulations
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TOMACS
1998
140views more  TOMACS 1998»
13 years 8 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...
VLSID
2003
IEEE
77views VLSI» more  VLSID 2003»
14 years 9 months ago
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri
DATE
2003
IEEE
131views Hardware» more  DATE 2003»
14 years 2 months ago
High Speed and Highly Testable Parallel Two-Rail Code Checker
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
Martin Omaña, Daniele Rossi, Cecilia Metra
ESM
1998
13 years 10 months ago
Hardware Modelling and Simulation Using an Object-Oriented Method
In order to reduce the cost, the time-to-market and to make the most pertinent choices, it becomes essential to allow designers to evaluate, very soon in the design phase, a given...
Frédéric Mallet, Fernand Boér...
DAC
2010
ACM
14 years 2 days ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...