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ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
13 years 11 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes
IV
2008
IEEE
107views Visualization» more  IV 2008»
14 years 1 months ago
Design Patterns for Rapid Visualization Prototyping
In this paper we present three software design patterns for rapid prototyping of information visualization applications. The first pattern describes a mapping of object oriented ...
Mark Giereth, Thomas Ertl
FTEDA
2007
78views more  FTEDA 2007»
13 years 7 months ago
Design Automation of Real-Life Asynchronous Devices and Systems
The number of gates on a chip is quickly growing toward and beyond the one billion mark. Keeping all the gates running at the beat of a single or a few rationally related clocks i...
Alexander Taubin, Jordi Cortadella, Luciano Lavagn...
IWSOS
2007
Springer
14 years 1 months ago
A New Approach to Adaptive Multi-routing Protocol for Mobile Ad Hoc Network
A routing protocol is designed considering a particular environment all the time which is not possible in the case of practical ad hoc networks. Because of the uncertainty in topol...
Ung Heo, Deepak G. C., Jaeho Choi
FCCM
1999
IEEE
146views VLSI» more  FCCM 1999»
13 years 11 months ago
Sepia: Scalable 3D Compositing Using PCI Pamette
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
Laurent Moll, Mark Shand, Alan Heirich