379 search results - page 46 / 76 » The Imagine Stream Processor |
JNCA
2007
13 years 7 months ago
2007
As the line rates standards are changing frequently to provide higher bit rates, the routers design has become very challenging due to the need for new wire-speed router’s netwo...
ISSS
1995
IEEE
13 years 11 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
SIAMSC
2010
13 years 6 months ago
2010
In this work we discuss a class of defect correction methods which is easily adapted to create parallel time integrators for multi-core architectures and is ideally suited for deve...
FPL
2003
Springer
14 years 28 days ago
2003
Springer
This paper describes a lightweight Field Programmable Gate Array (FPGA) circuit design that supports the simultaneous programming of multiple devices at different locations throug...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...