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CONNECTION
2006
172views more  CONNECTION 2006»
13 years 7 months ago
Temporal sequence detection with spiking neurons: towards recognizing robot language instructions
We present an approach for recognition and clustering of spatio temporal patterns based on networks of spiking neurons with active dendrites and dynamic synapses. We introduce a n...
Christo Panchev, Stefan Wermter
DAC
2010
ACM
13 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
ISPASS
2009
IEEE
14 years 2 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...
MICRO
2008
IEEE
79views Hardware» more  MICRO 2008»
13 years 7 months ago
Strategies for mapping dataflow blocks to distributed hardware
Distributed processors must balance communication and concurrency. When dividing instructions among the processors, key factors are the available concurrency, criticality of depen...
Behnam Robatmili, Katherine E. Coons, Doug Burger,...
CCS
2005
ACM
14 years 1 months ago
Automatic diagnosis and response to memory corruption vulnerabilities
Cyber attacks against networked computers have become relentless in recent years. The most common attack method is to exploit memory corruption vulnerabilities such as buffer ove...
Jun Xu, Peng Ning, Chongkyung Kil, Yan Zhai, Chris...