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» The Logic of Large Enough
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ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
14 years 6 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
LICS
2007
IEEE
14 years 3 months ago
A Complete Axiomatization of Knowledge and Cryptography
The combination of first-order epistemic logic and formal cryptography offers a potentially very powerful framework for security protocol verification. In this article, we addre...
Mika Cohen, Mads Dam
ASPDAC
1998
ACM
101views Hardware» more  ASPDAC 1998»
14 years 1 months ago
An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
Jinan Lou, Amir H. Salek, Massoud Pedram
ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
14 years 20 days ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
ICDE
2007
IEEE
145views Database» more  ICDE 2007»
14 years 10 months ago
Fast Identification of Relational Constraint Violations
Logical constraints, (e.g., 'phone numbers in toronto can have prefixes 416, 647, 905 only'), are ubiquitous in relational databases. Traditional integrity constraints, ...
Amit Chandel, Nick Koudas, Ken Q. Pu, Divesh Sriva...