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ARITH
2009
IEEE
14 years 4 months ago
Challenges in Automatic Optimization of Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
Ajay K. Verma, Philip Brisk, Paolo Ienne
EUROPAR
2005
Springer
14 years 2 months ago
Non-uniform Instruction Scheduling
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
Joseph J. Sharkey, Dmitry V. Ponomarev
ASPDAC
2004
ACM
126views Hardware» more  ASPDAC 2004»
14 years 2 months ago
High-level area and power-up current estimation considering rich cell library
— Reducing the ever-growing leakage power is critical to power efficient designs. Leakage reduction techniques such as power-gating using sleep transistor insertion introduces la...
Fei Li, Lei He, Joseph M. Basile, Rakesh J. Patel,...
SEMWEB
2004
Springer
14 years 2 months ago
Working with Multiple Ontologies on the Semantic Web
The standardization of the second generation Web Ontology Language, OWL, leaves a crucial issue for Web-based ontologies unsatisfactorily resolved: how to represent and reason with...
Bernardo Cuenca Grau, Bijan Parsia, Evren Sirin
CADE
1990
Springer
14 years 1 months ago
IMPS: An Interactive Mathematical Proof System
imps is an Interactive Mathematical Proof System intended as a general purpose tool for formulating and applying mathematics in a familiar fashion. The logic of imps is based on a...
William M. Farmer, Joshua D. Guttman, F. Javier Th...