Sciweavers

1960 search results - page 262 / 392
» The Logic of Large Enough
Sort
View
DATE
2004
IEEE
142views Hardware» more  DATE 2004»
14 years 2 months ago
Eliminating False Positives in Crosstalk Noise Analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...
CP
2006
Springer
14 years 2 months ago
Generating Propagators for Finite Set Constraints
Ideally, programming propagators as implementations of constraints should be an entirely declarative specification process for a large class of constraints: a high-level declarativ...
Guido Tack, Christian Schulte, Gert Smolka
FPL
2006
Springer
219views Hardware» more  FPL 2006»
14 years 2 months ago
FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks
This paper presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously in...
François-Xavier Standaert, Gaël Rouvro...
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
14 years 1 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
ICPP
1987
IEEE
14 years 1 months ago
A Software-Based Hardware Fault Tolerance Scheme for Multicomputers
-- A hardware fault tolerance scheme for large multicomputers executing time-consuming non-interactive applications is described. Error detection and recovery are done mostly by so...
Yuval Tamir, Eli Gafni