Sciweavers

1960 search results - page 85 / 392
» The Logic of Large Enough
Sort
View
ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
14 years 1 months ago
A fast dual-field modular arithmetic logic unit and its hardware implementation
— We propose a fast Modular Arithmetic Logic Unit (MALU) that is scalable in the digit size (d) and the field size (k). The datapath of MALU has chains of Carry Save Adders (CSA...
Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
DATE
2010
IEEE
170views Hardware» more  DATE 2010»
14 years 28 days ago
Analytical model for TDDB-based performance degradation in combinational logic
With aggressive gate oxide scaling, latent defects in the gate oxide manifest as traps that, in time, lead to gate oxide breakdown. Progressive gate oxide breakdown, also referred...
Mihir Choudhury, Vikas Chandra, Kartik Mohanram, R...
AAAI
2007
13 years 10 months ago
Complexity Boundaries for Horn Description Logics
Horn description logics (Horn-DLs) have recently started to attract attention due to the fact that their (worst-case) data complexities are in general lower than their overall (i....
Markus Krötzsch, Sebastian Rudolph, Pascal Hi...
DSN
2008
IEEE
13 years 9 months ago
An accurate flip-flop selection technique for reducing logic SER
The combination of continued technology scaling and increased on-chip transistor densities has made vulnerability to radiation induced soft errors a significant design concern. In...
Eric L. Hill, Mikko H. Lipasti, Kewal K. Saluja
UAI
2008
13 years 9 months ago
Improving the Accuracy and Efficiency of MAP Inference for Markov Logic
In this work we present Cutting Plane Inference (CPI), a Maximum A Posteriori (MAP) inference method for Statistical Relational Learning. Framed in terms of Markov Logic and inspi...
Sebastian Riedel