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» The MOLEN Processor Prototype
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FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
14 years 1 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas
MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
13 years 7 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas
IPPS
2010
IEEE
13 years 4 months ago
Prototype for a large-scale static timing analyzer running on an IBM Blue Gene
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...
WISES
2004
13 years 9 months ago
Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems
-- In this paper a Rapid Prototyping Framework and next steps towards the support for interactive Architecture Exploration based on the SPEAR processor core (Scalable Processor for...
Martin Jankela, Wolfgang Puffitsch, Wolfgang Huber
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...