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CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 1 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar
SSDBM
2005
IEEE
159views Database» more  SSDBM 2005»
14 years 1 months ago
Clustering Moving Objects via Medoid Clusterings
Modern geographic information systems do not only have to handle static information but also dynamically moving objects. Clustering algorithms for these moving objects provide new...
Hans-Peter Kriegel, Martin Pfeifle
ANCS
2005
ACM
14 years 1 months ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley
CAISE
2005
Springer
14 years 1 months ago
A Meta Model for Process Mining Data
Abstract. Modern process-aware information systems store detailed information about processes as they are being executed. This kind of information can be used for very different p...
Boudewijn F. van Dongen, Wil M. P. van der Aalst