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DAC
2011
ACM
12 years 8 months ago
Process-level virtualization for runtime adaptation of embedded software
Modern processor architectures call for software that is highly tuned to an unpredictable operating environment. Processlevel virtualization systems allow existing software to ada...
Kim M. Hazelwood
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
14 years 1 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
SIPS
2007
IEEE
14 years 3 months ago
Montgomery Modular Multiplication Algorithm on Multi-Core Systems
In this paper, we investigate the efficient software implementations of the Montgomery modular multiplication algorithm on a multi-core system. A HW/SW co-design technique is use...
Junfeng Fan, Kazuo Sakiyama, Ingrid Verbauwhede
ICPP
1999
IEEE
14 years 1 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
HIPC
2000
Springer
14 years 14 days ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir