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ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
14 years 2 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...
CASES
2006
ACM
14 years 2 months ago
Adaptive object code compression
Previous object code compression schemes have employed static and semiadaptive compression algorithms to reduce the size of instruction memory in embedded systems. The suggestion ...
John Gilbert, David M. Abrahamson
TACAS
2012
Springer
275views Algorithms» more  TACAS 2012»
12 years 4 months ago
Pushdown Model Checking for Malware Detection
The number of malware is growing extraordinarily fast. Therefore, it is important to have efficient malware detectors. Malware writers try to obfuscate their code by different tec...
Fu Song, Tayssir Touili
DSD
2007
IEEE
122views Hardware» more  DSD 2007»
14 years 3 months ago
Energy Based Design Space Exploration of Multiprocessor VLIW Architectures
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksr...
CASES
2001
ACM
14 years 14 days ago
Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures
In this paper we describe a design exploration methodology for clustered VLIW architectures. The central idea of this work is a set of three techniques aimed at reducing the cost ...
Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, ...