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CONCURRENCY
2000
155views more  CONCURRENCY 2000»
13 years 7 months ago
Annotating Java class files with virtual registers for performance
The Java .class file is a compact encoding of programs for a stack-based virtual machine. It is intended for use in a networked environment, which requires machine independence an...
Joel Jones, Samuel N. Kamin
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
14 years 1 months ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...
ASPDAC
2007
ACM
88views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Voltage Island Generation under Performance Requirement for SoC Designs
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
Wai-Kei Mak, Jr-Wei Chen
DSN
2002
IEEE
14 years 18 days ago
Detecting Processor Hardware Faults by Means of Automatically Generated Virtual Duplex Systems
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
Markus Jochim
ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
14 years 1 days ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...