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LCTRTS
1998
Springer
13 years 11 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström
C3S2E
2009
ACM
13 years 11 months ago
The promise of solid state disks: increasing efficiency and reducing cost of DBMS processing
Most database systems (DBMSs) today are operating on servers equipped with magnetic disks. In our contribution, we want to motivate the use of two emerging and striking technologi...
Karsten Schmidt 0002, Yi Ou, Theo Härder
CHES
2006
Springer
158views Cryptology» more  CHES 2006»
13 years 11 months ago
Hardware/Software Co-design of Elliptic Curve Cryptography on an 8051 Microcontroller
8-bit microcontrollers like the 8051 still hold a considerable share of the embedded systems market and dominate in the smart card industry. The performance of 8-bit microcontrolle...
Manuel Koschuch, Joachim Lechner, Andreas Weitzer,...
FPL
2006
Springer
127views Hardware» more  FPL 2006»
13 years 11 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
APCSAC
2000
IEEE
13 years 11 months ago
Dataflow Java: Implicitly Parallel Java
Dataflow computation models enable simpler and more efficient management of the memory hierarchy - a key barrier to the performance of many parallel programs. This paper describes...
Gareth Lee, John Morris