Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Abstract. Although Cai, F¨urer and Immerman have shown that fixedpoint logic with counting (IFP + C) does not express all polynomialtime properties of finite structures, there h...
Dynamic epistemic logic (DEL) as viewed by Baltag et col. and propositional dynamic logic (PDL) offer different semantics of events. On the one hand, DEL adds dynamics to epistem...
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...