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ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
14 years 25 days ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
14 years 17 days ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat
IJCNN
2000
IEEE
14 years 9 days ago
Exploiting the Selfish Gene Algorithm for Evolving Cellular Automata
This paper shows an application in the field of Electronic CAD of the Selfish Gene algorithm, an evolutionary algorithm based on a recent interpretation of the Darwinian theory. Te...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
ITC
2000
IEEE
88views Hardware» more  ITC 2000»
14 years 9 days ago
Predicting device performance from pass/fail transient signal analysis data
Transient Signal Analysis (TSA) is a Go/No-Go device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, a technique based o...
James F. Plusquellic, Amy Germida, Jonathan Hudson...
VTS
2000
IEEE
114views Hardware» more  VTS 2000»
14 years 8 days ago
Detection of CMOS Defects under Variable Processing Conditions
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, the power supply transient...
Amy Germida, James F. Plusquellic