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VLSID
2006
IEEE
170views VLSI» more  VLSID 2006»
14 years 8 months ago
16-Bit Segmented Type Current Steering DAC for Video Applications
In this paper, 16-bit, 50 MHz Current Steering DAC is designed. This DAC is implemented using TSMC 0.35 ?m technology. An optimum segmentation is done of 16-bits into binary and t...
Gaurav Raja, Basabi Bhaumik
ICC
2007
IEEE
135views Communications» more  ICC 2007»
14 years 2 months ago
New Results on Single-Step Power Control System in Finite State Markov Channel: Power Control Error Modelling and Queueing Varia
— The analysis regarding the impact of the single-step power control (SSPC) scheme on the system performance such as bit error rate, packet error rate and queueing variation is h...
Shi-Yong Lee, Min-Kuan Chang
TSP
2010
13 years 2 months ago
MIMO transceivers with decision feedback and bit loading: theory and optimization
This paper considers MIMO transceivers with linear precoders and decision feedback equalizers (DFEs), with bit allocation at the transmitter. Zero-forcing (ZF) is assumed. Consider...
Ching-Chih Weng, Chun-Yang Chen, P. P. Vaidyanatha...
CORR
2010
Springer
131views Education» more  CORR 2010»
13 years 8 months ago
Ergodic and Outage Performance of Fading Broadcast Channels with 1-Bit Feedback
In this paper, the ergodic sum-rate and outage probability of a downlink single-antenna channel with K users are analyzed in the presence of Rayleigh flat fading, where limited cha...
Bo Niu, Osvaldo Simeone, Oren Somekh, Alexander M....
APCCAS
2006
IEEE
206views Hardware» more  APCCAS 2006»
14 years 1 months ago
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory
—A pre-comparison scheme is designed by using the NOR-type 10T content addressable memory (CAM) between the match line circuits and the pre-charging circuits. Thereby, several bi...
Po-Tsang Huang, Wei-Keng Chang, Wei Hwang