283 search results - page 16 / 57 » The Price of Routing in FPGAs |
ITC
1998
IEEE
13 years 11 months ago
1998
IEEE
: We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affect...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
FPGA
1997
ACM
13 years 11 months ago
1997
ACM
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
ICES
2005
Springer
14 years 1 months ago
2005
Springer
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
DATE
2003
IEEE
14 years 25 days ago
2003
IEEE
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...