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» The Price of Routing in FPGAs
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FPGA
1997
ACM
142views FPGA» more  FPGA 1997»
13 years 11 months ago
Architectural and Physical Design Challenges for One-Million Gate FPGAs and Beyond
Process technology advances tell us that the one-million gate Field-Programmable Gate Array (FPGA) will soon be here, and larger devices shortly after that. We feel that current a...
Jonathan Rose, Dwight D. Hill
FPGA
1997
ACM
168views FPGA» more  FPGA 1997»
13 years 11 months ago
Memory-to-Memory Connection Structures in FPGAs with Embedded Memory Arrays
This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to mul...
Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vran...
STOC
2002
ACM
111views Algorithms» more  STOC 2002»
14 years 7 months ago
The price of anarchy is independent of the network topology
We study the degradation in network performance caused by the selfish behavior of noncooperative network users. We consider a model of selfish routing in which the latency experie...
Tim Roughgarden
MAM
2006
95views more  MAM 2006»
13 years 7 months ago
Stochastic spatial routing for reconfigurable networks
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
André DeHon, Randy Huang, John Wawrzynek
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 1 months ago
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs
Triple Modular Redundancy (TMR) is a suitable fault tolerant technique for SRAM-based FPGA. However, one of the main challenges in achieving 100% robustness in designs protected b...
Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Ca...