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ICC
2007
IEEE
130views Communications» more  ICC 2007»
14 years 1 months ago
A Distributed Scheme for Responsive Network Engineering
— Optimal bandwidth utilisation together with resilience and recovery from failure are two key drivers for Traffic Engineering (TE) which have been widely addressed by the IP co...
Johannes Göbel, Anthony E. Krzesinski, Dieter...
GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
14 years 23 days ago
Zero overhead watermarking technique for FPGA designs
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...
Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
14 years 21 days ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
13 years 12 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
13 years 11 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose