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» The Primacy of Process Architecture
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HPCA
2008
IEEE
16 years 5 months ago
PEEP: Exploiting predictability of memory dependences in SMT processors
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
Samantika Subramaniam, Milos Prvulovic, Gabriel H....
HPCA
2006
IEEE
16 years 5 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
HPCA
2006
IEEE
16 years 5 months ago
CORD: cost-effective (and nearly overhead-free) order-recording and data race detection
Chip-multiprocessors are becoming the dominant vehicle for general-purpose processing, and parallel software will be needed to effectively utilize them. This parallel software is ...
Milos Prvulovic
148
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HPCA
2004
IEEE
16 years 5 months ago
Understanding Scheduling Replay Schemes
Modern microprocessors adopt speculative scheduling techniques where instructions are scheduled several clock cycles before they actually execute. Due to this scheduling delay, sc...
Ilhyun Kim, Mikko H. Lipasti
RECOMB
2008
Springer
16 years 5 months ago
Hurdles Hardly Have to Be Heeded
Abstract. As data about genomic architecture accumulates, genomic rearrangements have attracted increasing attention. One of the main rearrangement mechanisms, inversions (also cal...
Krister M. Swenson, Yu Lin, Vaibhav Rajan, Bernard...