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» The Projection of Systolic Programs
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ASAP
2007
IEEE
136views Hardware» more  ASAP 2007»
14 years 1 months ago
0/1 Knapsack on Hardware: A Complete Solution
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
K. Nibbelink, S. Rajopadhye, R. McConnell
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 8 days ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
IPPS
2003
IEEE
14 years 19 days ago
PROSIDIS: A Special Purpose Processor for PROtein SImilarity DIScovery
This work presents the architecture of PROSIDIS, a special purpose processor designed to search for the occurrence of substrings similar to a given ‘template string’ within a ...
Alessandro Marongiu, Paolo Palazzari, Vittorio Ros...
POPL
2000
ACM
13 years 11 months ago
Projection Merging: Reducing Redundancies in Inclusion Constraint Graphs
Zhendong Su, Manuel Fähndrich, Alexander Aike...