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DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 3 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 2 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
SAC
2004
ACM
14 years 2 months ago
Towards a flexible, process-oriented IT architecture for an integrated healthcare network
Healthcare information systems play an important role in improving healthcare quality. As providing healthcare increasingly changes from isolated treatment episodes towards a cont...
Mario Beyer, Klaus Kuhn, Christian Meiler, Stefan ...
MONET
2010
125views more  MONET 2010»
13 years 7 months ago
GTPP: General Truncated Pyramid Peer-to-Peer Architecture over Structured DHT Networks
— Hierarchical Distributed Hash Table (DHT) architectures have been among the most interesting research topics since the birth of flat DHT architecture. However, most of the prev...
Zhonghong Ou, Erkki Harjula, Timo Koskela, Mika Yl...
DAC
2005
ACM
14 years 10 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...