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DATE
2008
IEEE
145views Hardware» more  DATE 2008»
14 years 4 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
WWW
2005
ACM
14 years 10 months ago
Design for verification for asynchronously communicating Web services
We present a design for verification approach to developing reliable web services. We focus on composite web services which consist of asynchronously communicating peers. Our goal...
Aysu Betin-Can, Tevfik Bultan, Xiang Fu
ICSE
2000
IEEE-ACM
14 years 1 months ago
Workshop on multi-dimensional separation of concerns in software engineering
Separation of concerns has been central to software engineering for decades, yet its many advantages are still not fully realized. A key reason is that traditional modularization ...
Peri L. Tarr, William H. Harrison, Harold Ossher, ...
ARC
2007
Springer
169views Hardware» more  ARC 2007»
14 years 4 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
14 years 3 months ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar